SUMMARY VITA – Stephen Craven, Ph.D.

Assistant Professor

Years on Faculty:    0 (original appointment 08/01/08)

Degrees

University of Tennessee at Chattanooga	Engineering	B.S., 1999
Georgia Institute of Technology	Electrical and Computer Engineering	M.S., 2000
Virginia Polytechnic and State University	Electrical Engineering	Ph.D., 2008

Other Related Experience

Graduate Research Assistant (1999-2000) – Georgia Institute of Technology, Department of Electrical Engineering.
Functional Design Engineer (2001-2002) – Lucent Technologies, Atlanta, GA.

Graduate Research Assistant (2003-2006) – Virginia Polytechnic and State University, Bradley Department of Electrical Engineering and Computer Engineering.

Senior Research Engineer (2006-2008) – Luna Innovations Incorporated, Roanoke, VA.                                       

Consulting and Patents

• Luna Innovations Incorporated (2008).

Principal Publications of Last Five Years

1. “Design and Characterization of a Hardware Encryption Management Unit for Secure Computing Platforms”, Anthony Mahar, Peter Athanas, Stephen Craven, Joshua Edmison, and Jonathan Graf, Proceedings of the 39th Hawaii International Conference on System Sciences, HICSS 2006 / MOCHA 2006, Kauai, HI, Jan 2006.
2. “A Methodology for Generating Application-Specific Heterogeneous Processor Arrays”, Stephen Craven, Cameron Patterson, and Peter Athanas, Proceedings of the 39th Hawaii International Conference on System Sciences, HICSS 2006, Kauai, HI, Jan 2006.
3. “A High-Level Development Framework for Run-Time Reconfigurable Applications”, Stephen Craven, Cameron Patterson, and Peter Athanas, Proceedings of the 9th Annual Conference on Military and Aerospace Programmable Logic Devices, MAPLD 2006, Washington, DC, Sep 2006.
4. “Examining the Viability of FPGA Supercomputing”, Stephen Craven and Peter Athanas, EURASIP Journal on Embedded Systems, vol. 2007, special issue “Dynamically Reconfigurable Architectures”.
5. “High-Level Specification of Runtime Reconfigurable Designs”, Stephen Craven and Peter Athanas, Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 2007, Las Vegas, NV, Jun 2007.
6. “Runtime Reconfigurable Computing-Based FPGA Anti-Tamper Techniques,” Jonathan Graf and Stephen Craven, Proceedings of the DoD Anti-Tamper Conference, May 2008, Huntsville, AL.
7. “Dynamically Reconfigurable Radios from a High-Level Specification,” Stephen Craven and Peter Athanas, Proceeding of the National Aerospace Electronics Conference 2008 (NAECON), July 16-18, 2008, Dayton, OH.

Grants Received

1. “Dynamic Hardware Development Methodology for FPGAs”, Phase I, Stephen Craven (PI), funded by DARPA, December 2006 – August 2007, $98,900 (Luna Innovations Incorporated)
2. “Body Wearable Diversity Antenna Systems for Increased Antenna Performance”, Stephen Craven (initial PI), funded by the Army, awarded November 2007, $65,000 (Luna Innovations Incorporated)
3. “Dynamic Hardware Development Methodology for FPGAs”, Phase II, Stephen Craven (initial PI), funded by DARPA, June 2008 – August 2010, $740,000 (Luna Innovations Incorporated)

Scientific and Professional Society Memberships

Member IEEE

Honors and Awards

• William Brock Scholar, 1994-1998
• McDonnell Douglas Quality Achievement Award, 1997
• Tau Beta Pi Fellow, 1999-2000
• Bradley Fellowship, 2003-2006

Professional Development Activities in the Last Five Years

Attended the NASA International Conference on Military and Aerospace Programmable Logic Devices (MAPLD), Washington, D.C., 2004, 2005, 2006

Attended the Hawaii International Conference on System Sciences (HICSS), Kaui, HI, 2006

Attended the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, NV, 2007

Attended the NSF Center for High Performance Reconfigurable Computing (CHReC) Midyear Workshop 2007, 2008